طراحی و شبیه‌سازی مبدل ترنری به باینری بهینه شده بر پایه ترانزیستورهای اثر میدان نانو لوله کربنی

نوع مقاله : مقاله پژوهشی

نویسندگان

1 گروه مهندسی برق، دانشگاه شهید مدنی آذربایجان، تبریز

2 گروه مهندسی برق- دانشکده فنی ومهندسی دانشگاه شهید مدنی آذربایجان

3 هیات علمی-دانشگاه شهید مدنی آذربایجان

چکیده

این مقاله یک مبدل ترنری به باینری چند‌رقمی بهینه شده مبتنی بر ترانزیستورهای‌اثر‌میدان‌نانو‌لوله‌کربنی ارائه می‌دهد. با توجه به ویژگیهای منحصر بفرد ترانزیستورهای اثر‌میدان‌ نانو ‌لوله‌کربنی همانند امکان طراحی با ولتاژ آستانه­های مختلف برای ترانزیستور، طراحی سیستم­های منطقی چند ارزشی به مراتب ساده­تر و کم هزینه­تر می باشد. لذا با توجه به اینکه سیستم­های پردازشی موجود با مبنای دو کار می­کنند طراحی مبدل­های باینری به ترنری و برعکس، سیستم­های پردازشی بسیار مهم و اساسی است. در این مقاله  با اصلاح در بخشی از ساختار مداری مبدل ترنری به باینری سه‌رقمی کارایی سیستم افزایش یافته است. اصلاح مدار باعث کاهش سطح اشغالی تراشه، کاهش توان مصرفی و کاهش تاخیر مدار شده است. عملکرد مناسب و کارایی بهینه مبدل پیشنهادی با استفاده از شبیه‌سازی توسط نرم-افزار HSPICE و بر مبنای ترانزیستورCNTFET   32 نانومتر تأیید شده است. نتایج شبیه سازی نشان می‌دهد که مبدل ترنری به باینری 3 به 5 بهینه دارای توان مصرفی 665/0 و تاخیر انتشار 3/27 پیکو‌ثانیه است. این نتایج نشان می‌دهد به طور کلی شاخص PDP به میزان 4/14درصد بهبود یافته است.

کلیدواژه‌ها

عنوان مقاله [English]

Design and simulation of an optimized Ternary-to-Binary converter based on carbon nanotube field effect transistor

نویسندگان [English]

  • seyed saeed Moosavy 1
  • Mousa Yousefi 2
  • Khalil Monfaredi 3
1 Faculty of Engineering, Azarbaijan Shahid Madani University, Tabriz
2 Faculty of Engineering , Azarbaijan Shahid Madani University
3 assistant professor-Azarbaijan Shahid Madani University
چکیده [English]

This paper presents an optimized multi-digit Ternary to Binary converter based on nano-carbone tubes field-effect transistors. By modifying a part of the circuit structure of the ternary-to-binary converter, the efficiency of the system has increased. Due to the unique features nanotubes carbon tubes feild effect transistors, as well as the possibility of designing different threshold voltages for transistors, designing multi-level logic systems is much simpler and less costly. Therefore, considering that the existing processing systems work on a dual basis, the design of binary to bernary converters and vice versa is very important and basic processing systems. Therefore, considering that the existing processing systems work on a binary, the design of binary to turner and turner to binary converters is very important and fundamental in processing systems. The circuit modification has reduced chip occupancy, reduced power consumption, and reduced circuit latency. The proper and optimal performance of the proposed converter have been confirmed by simulation by HSPICE software based on 32 nm CNTFET transistor. The simulation results show that the optimal terbnary to binary converter has a power consumption of 0.665 μW and a propagation delay of 27.3 ps. These results show that overall PDP index has improved by 14.4%.

کلیدواژه‌ها [English]

  • Ternary to Binary Converter
  • Multi level Logic
  • carbon nanotube field effect transistors

مراجع

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